Design and develop mixed signal circuits, test vehicles, and teststructures to support the development of TIE's 3D-ADK (Assembly Design Kit).Help develop workflows, 2.5D/3D modeling methods, and standard cells to comprehend and optimize Power/Thermal/Mechanical/Signal Integrity/RF impacts of multi-chiplet, heterogeneous micro-systems.Work with Product and Test engineering teams to comprehend and design in requirements to ensure yield, reliability, and support BIST (Built in Self Test) requirements.Work closely with EDA vendors and their tool/modeling solutions to drive improvements in their tool offerings and capability. Develop and implement advanced models to analyze and predict the effects of semiconductor packaging on device performance, reliability, and lifetimes.Participate in industry design standards body's and workshops to promote open access 3DHI and Digital Twin enablement. Bring key aspects back into TIE designs and workflows to enable open-access solutions compatible with industry trends.Collaborate with internal and external design teams to ensure package compatibility with semiconductor die and system-level requirements.Design and execute experiments to evaluate and optimize packaging performance, reliability, and manufacturability.Conduct rigorous simulation and validation studies to verify the performance, reliability, and testability of semiconductor packaging designs.Stay current with industry trends and emerging technologies in semiconductor packaging and design integration to drive innovation and continuous improvement.